TM 11-7021-202-12
Table 1-2. Processor Characteristics, Capabilities, and Features
Data
Item
CPU
Microprogrammed
Architecture:
64 bits
Microinstruction Word Length:
4096 Words
Microinstruction Capacity:
16 bits (single),
Instruction Length:
32 bits (double)
4 Integer -- 16 bits (optional)
Hardware Accumulators:
2 Integer -- 16 bits
Index Registers:
Fixed-Point Arithmetic
Instruction Types:
Logical Operations
Character Operations
Floating Point
Direct
Addressing Modes:
Immediate
Indexed
Program Counter Relative
Accumulator Relative
Multi-Level Indirect
Separate Memory In/Out
Bus Structure:
I/O
,
Prefetch Processor
SEMICONDUCTOR MEMORY
256k Words internal
Capacity
500 nanoseconds
Cycle Time:
2-way or 4-way
Interleaving:
64k Words, 21 bits
Module Capacity:
Single bit ERCC (5-bit code)
Error Checking:
1-4
