TM11-7021-202-12
Section Il. EQUIPMENT DESCRIPTION AND DATA
1-8.
EQUIPMENT DESCRIPTION
The processor is one in a family of military computers supporting scientific and real-time
applications requiring high speed processing and throughput. The processor provides proven
reliability and high resistance to severe operating environments.
The processor is packaged in a single, conductively cooled air-transport rack (ATR)
chassis/mainframe with wraparound heat exchanging. The chassis/mainframe provides an
exit path for heat being generated by the power supply and printed-circuit boards (PCB).
Cool air sucked in at the front of the processor is drawn through the air ducts on each side
of the chassis absorbing heat as the air flows over the heat-conducting surfaces. The heated
air is exhausted at the rear of the unit. Access for servicing the processor is facilitated by
the removal of the power supply, front panel, and top and bottom cover plates.
Depending upon processor configuration (table 1-1), there may be either core or memory,
configured with one of two types of Central Processing Unit (CPU) PROM printed-circuit
boards (PCB), one of two types of Floating Point Unit (FPU) "C" PCB; and one of two types
of motherboard processor may be powered by an ac or dc power supply. Additionally, a
wide selection of input/output (1/0) interface PCB may be employed.
Eight input/output (I/0) slots are provided in the processors card cage for a maximum
configuration of eight I/0 interfaces. The I/0 interfaces contain the interface logic and
circuits that effect the two-way transfer of information and data between the processors CPU
section and peripheral devices. It includes direct-memory access for high-speed devices.
A built-in test feature (BITE) provides a series of self-test diagnostics that are automatically
performed at power-up as an aid in assuring processor readiness and the isolation of fault
conditions.
A battery back-up feature for semiconductor memory configurations can be implemented to
retain memory integrity in the event of power interruption.
Operator control of the CPU is provided through a system terminal when the CPU is in the
virtual console (VC) mode. This mode permits boot/load operations, program loading, and
diagnostic program loading. In addition, it provides the operator with the means of inserting
break-points, examining and/or modifying the contents of a memory location or an internal
software register, injecting standard program control functions, and the running of
diagnostics.
1-9.
EQUIPMENT CHARACTERISTICS, CAPABILITIES, AND FEATURES
1-3
