TM 11-5805-424-15/NAVSHIPS 0967-220-9010/TO 31W2-2G-41
c. Troubleshooting Chart-Continued
Item
Symptom
Probable e
Corrective measure
No.
20
No receive data available,
a. Defective circuit on demodulator
a. Troubleshoot demodulator as
but all timing signals are
module assembly A8 (fig. 8-13):
follows:
normal; receive carrier
(1) Defective amplifier AM-5,
(1) Check amplifier in which no
alarm not activated, no-
AM-6, or AM-8.
output appears (para 6-7b);
transition receive alarm
replace defective components
activated.
(2) Defective receive discriminator
(2) Check output signal at pin L of
FL3 or amplifier AM-7.
PC 80034020 (fig. 6-9). If not
present, replace receive dis-
criminator (fig. 2-6) on MX-
73(*)/G. If present, check for
output at TP2 of PC 80034020
amplifier AM-7 (para 6-7b).
(3) Defective operational amplifier
(3) Check for output waveform at
Q5, Q6.
collector of transistors Q5 and
Q6 (fig. 6-9). If not present,
make voltage and resistance
measurements of applicable
operational amplifier (fig. 6-35);
replace defective components
(4) Defective feedback circuit QS or sine
(4) Check for a wave output at
Q15.
junction of diodes CR2 and CR4
CR13. If not present. take volt-
age and resistance measurements
of applicable feedback circuit
ponents (fig. 6-9).
(5) Defective shaper circuit Q6 or
(5) Check for output square wave at
Q16.
TP1 and TP2 of PC 80034020 (fig.
and resistance measurements of
the applicable shaper circuit (fig.
(6) Defective phase detector circuit
(6) Check for output data signal at
Q7, QS.
pin K of PC 80034020 connector
voltage and resistance of phase
detector circuit (fig. 6-35); re-
place defective components (fig.
(7) Defective amplifier NA-1 .
(7) Take voltage and resistance meas-
urements of Q17, Q18 circuitry
ponents (fig. 6-9).
(8) Defective -volt clamp circuit
(8) Check for output data signal at
Q19.
test jack J2 on PC 80034020
amplifier stage Q19 circuitry
components (fig. 6-9).
b. Defective receive discriminator
b. Check for output data signal at
FL3 on MX-73(*)/G (fig. 2-6).
TP10 on the control bracket (fig.
6-48
