TM11-7025-229-12
when the transfer is from the adapter, and the byte is loaded from the input buffer of the controller onto the bidirectional
bus by signal RSTR* when the transfer is to the adapter. As explained previously, the direction of a transfer is defined to
be with respect to the host computer. Therefore, the output buffer of the controller is loaded by the adapter when the
adapter outputs a byte.
Byte transfers are either from the input buffer or to the output buffer. These two buffers transfer the byte to or from two
ports, the command port or data port. The command port transfers commands on output from the adapter and transfers
status on input to the adapter. The data port transfers data bytes in both directions. The port used, actually the source or
destination of the byte within the Disk Controller PCB, is determined by signal DATA*. When this signal is true, the data
port is selected.
A Z-80 microprocessor controls the operation of the controller PCB. A 2K x 8 PROM contains the microprogram that the
microprocessor executes. The microprocessor interprets and executes commands from the adapter by issuing
commands to the rest of the subsystem and by transferring status to the adapter and data between the adapter and the
disk.
There are three major buses on the controller: DB0-7, D0-7, and A0-15. Bus DB0-7 is a bidirectional bus that handles
byte transfers between the input and output registers and the ports. Bus D0-7 is the bidirectional bus of the
microprocessor and bus A0-15 is an address bus.
Bus DB0-7 transfers command, status, and data bytes between the input and output buffers and the rest of the controller.
Data read from the disk is transferred from the read/write control circuitry to a 2K RAM buffer on the bus and then, over
the same bus, to the input buffer for transfer to the adapter. During a write operation, data from the output buffer is
stored in the 2K RAM via the bus, and then transferred on the bus to the read/write control circuitry. Under the control of
the microprocessor, bytes can be exchanged between the DB0-7 bus and the D0-7 bus. Command bytes from the
adapter are loaded in the output buffer, enabled onto the CB0-7 bus, transferred to the D0-7 bus, and loaded into the
command register. Status bytes stored in the status register are enabled onto the D0-7 bus, transferred to the DB0-7 bus
and loaded in the input buffer for the adapter to read.
The D0-7 bus is the bidirectional bus of the microprocessor. As input to the microprocessor, this bus supplies the
contents of the command register, the disk status, and microinstructions from the PROM. On output from the
microprocessor, the microprocessor uses this bus to load the status register and issue bit-oriented commands to the
control logic of the controller PCB and electronics PCB. The bus is also used to transfer commands a byte at a time to
the electronics PCB over the BUS 0-7 bus.
The A0-A15 bus is the address bus of the microprocessor. The microprocessor uses the bus to address the PROM
containing the microprogram and the 2K RAM buffer used for data transfers to or from disk. In addition to addressing,
bits A8 and A11-A15 are used as control signals.
Controls signals coordinate transfers between the disk and the adapter. When the controller can not accept another
command from the adapter because it is busy performing the current command, the signal CBUSY will be true; otherwise
it will be false. When the controller completes a command from the adapter, it causes signal ATTN* to go true, informing
the
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