TM 11-7440-232-12/NAVELEX 0967-LP-275-5010
(4) The FSK modulator is controlled by the clock signal. Input signals to this circuit are supplied by the data
amplifier for low speed operation, or by the encoder for high speed operation. Whenever the modulator input is a high
level, it produces a 1200 Hz output. If the input is low, it allows the positive-going edge of the clock signal to change, this
results in a 2400 Hz output. In the duobinary mode, the encoder output for a "0" bit causes the modulator output to
alternate between a half cycle of 1200 Hz and a full cycle of 2400 Hz. This results in an average line frequency of 1800
Hz. A "1" bit in the duobinary mode is represented by a line frequency of either 1200 or 2400 Hz.
(5) The amplifier following the FSK modulator amplifies the modulated signal to a level suitable for application
to the transmit line and then extends this signal to the low pass filter. The filter passes signal products up to about 4 KHz
so that the output resembles a sine wave. The coupling transformer between the filter and the line provides impedance
matching from the unbalanced modem output to balanced lines of 300, 600 or 900 ohms. The output signal from the low
pass filter also extends to the REC MODE switch in the limiter discriminator.
(6) When the REC MODE switch is operated to the BACK-TO-BACK position the transmitter output is applied
to the receiver input. This loop back arrangement enables the receiver output to be compared with a known data pattern