TM 11-5805-424-15/NAVELEX 0967-220-9010/TO 31W2-2G-41
(4) Amplifier INV- circuit. Amplifier IN-8 inverts the
voltage applied to the base of transistor Q7 is
now highly negative, limited by the current flow
output of transistor Q11, providing +6 volts to
through resistor R22 and the charge on
the output during the no-alarm condition, and
capacitor C6 (approximately -9 volts). The
providing ground during the alarm condition.
negative voltage turns Q7 on and provides a
Diode CR10 clamps the output voltage from
positive level to the base of transistor Q8;
transistor Q12 to +6 volts when transistor Q12 is
thereby cutting off transistor Q8. Resistor R24
cut off. Resistor R36 is the base current-limiting
is the common emitter load resistor, resistors
resistor, and resistor R37 is the collector load
R26 and R28 are the collector load resistors for
transistors Q7 and Q8, respectively, and
resistors R27 and R25 provide for initial forward
5-14. Receive Input and Carrier Alarm Circuits
bias for transistor Q8 when data input signals
are applied to the amplitude detector.
(3) 2-Secoond delay circuit.
a. General. The receiver input circuits consist of
(a) With data signals applied to the amplitude
two input amplifiers, used in conjunction with receive
detector, transistor Q7 is cut off and Q8 is
filter FIL1, and an optional delay equalizer module (para
conducting ((2) above), causing transistor
5-18). The alarm circuits consist
of a level threshold
Q9 to conduct.
Resistor R29 drops
circuit, an amplitude detector circuit, three amplifiers, an
sufficient voltage to provide a forward
OR gate, and a 2-second delay circuit.
bias for transistor Q9. With transistor Q9
b. Receive Input Circuit. Input fsk signals are
conducting, capacitor C7 does not charge;
consequently, a ground is applied to the
transistor Q1. Transistor Q1 is basically an emitter
Q10 base, which cuts off transistor Q10.
follower, with capacitor C1 as the collector bypass.
With transistor Q10 cut off, +15 volts is
Resistor R5 is the collector current limiting resistor, and
applied to the base of transistor Q11,
resistor R1 is the emitter load resistor. The amplifier
which cuts off transistor Q11 and supplies
input signal is applied through dc coupling resistor R3 to
-6 volts to the alarm circuits (no alarm).
a load resistor in receive filter FL1, and directly to the
(b) When input data is removed from the
delay equalizer circuit, if used (par 5-18). The signal is
fed from FL1 (pin 26) or the delay equalizer circuit to
conducts and transistor Q8 cuts off ((2)
second input amplifier Q2, Q16, a degenerative
above) ; this action causes transistor Q9
amplifier that impedance matches receive filter FL1.
to cut off and allow capacitor C7 to charge
Resistors R2 and R4 provide linear biasing of the stage,
toward +15 volts. When the charge on
resistors R47 and R49 are the collector load resistors,
capacitor C7 reaches a sufficient
and resistor R48 is the emitter load resistor. The
potential, diode CR9 becomes forward
second input amplifier output is applied to receive filter
biased, causing transistor Q10 to conduct,
FL1, which passes only the desired channel frequencies
grounding the base of transistor Q11, and
thus causing Q11 to conduct.
c. Alarm Circuits.
(c) With transistor Q11 conducting, +6 volts
is applied to the alarm circuits, which
amplifier Q15 (an emitter follower that provides
activates the alarm. When the input
signal to the amplitude detector is
capacitor C2) and applied to REC CARRIER
restored, capacitor C7 discharges, cutting
off transistor Q10 and thus 5-12 applying -
6 volts to the alarm circuits ((a) above).